For technical documentation, see Zapper HOWTO.
The Zapper ZP10 is a complete programmable controller circuit board, which supports concurrent development of software, logic code and custom hardware. The primary objective is to allow you to realise your electronic product ideas in an efficient, practical and cost-effective manner.
The ZP10 includes the necessary micro-controller (MCU), volatile and non-volatile memory, programmable logic device (FPGA) and power-supply circuitry on a compact circuit board. A key feature is the user of standard header pins for all external signals, making it ideally suited for quick-turn prototyping. It has been designed first and foremost for reliable and cost-effective manufacture.
Two different ARM7 based micro-controllers from NXP and five different Spartan 3A programmable logic devices from Xilinx can be selected, to allow cost and performance to be tuned to the application requirements.
The FPGA logic code is automatically loaded by the micro-controller during the boot process. The FPGA has a programmable clock oscillator so that the frequency can be tailored to match your application and power supply requirements.
There is a 16-bit memory bus interface and an SPI interface in between the MCU and the FPGA, making it possible to add custom peripheral devices into the FPGA to suit your application requirements. The memory bus interface does consume some MCU and FPGA input/output pins, however, care has been taken to ensure that the optimal number of MCU alternate functions are directly accessible from external pins.
It is also possible to disable the clock or completely shut off the power supply to the FPGA while the microcontroller continues normal operation, in order to conserve power at times when the FPGA functionality may not be required. SUSPEND/AWAKE functionality is also supported so the FPGA can monitor certain input/output pins, while consuming minimal power.
All ethernet, USB host, USB device, RS-232, RS-485, CAN, Dallas 1-wire, SD-card, I2C and power pins are conveniently accessible through one of the four external headers on the left-hand side of the board. All LCD controller pins are grouped together and made available through a header at the right-hand side of the board. Most of the FPGA pins are accessible through the top header and the remainder, together with the MCU input/output pins through the bottom header. Care has been taken to keep the signal traces as short as possible and most have been kept on a single layer, optimizing board reliability.
There are no confusing jumpers on the Zapper ZP10. All functionality is under program control. A reset button and some general-purpose LEDs are provided to assist with initial program development.
The ZP10 is supplied complete with U-Boot bootloader, uClinux operating system, all the necessary software device drivers and essential FPGA logic code, so you can hit the ground running. Code and data images can be fetched from a host system via TFTP (Trivial File Transfer Protocol) with commands issued via the serial console to U-Boot. U-Boot can also be configured to automatically boot the system via TFTP on start-up. Support for network booting means that your code compilation and downloading is fast and efficient.
The software development toolchain is based on GNU GCC. Many popular Linux/Unix software packages are easily portable to uClinux, and several are provided with the Zapper, with complete source code.
Main Power Supply
- Input surge supression 1500 W @ 100 V
- Over-voltage cutout: 20 V DC
- Input voltage range: 7.5 V to 20 V DC
- EMI protection filter
- 3.3 V @ 2 A
- 5 V @ 2 A
- Over/under voltage detection
FPGA Power Supply
- 4-channel: Core, auxiliary, I/O x2
- Programmable voltage levels
- I2C control
- Ethernet PHY: 10/100T
- RS-232: 2x 1 Mbps
- RS-485: 40 Mbps
- CAN: 1 Mbps
- Dallas 1-wire
Choice of two 72 MHz MCUs (ARM7-TDMI core) from NXP:
- LPC2468, without LCD controller (standard)
- LPC2478, with LCD controller
- 4x gain control input op-amps to ADC
- 1x DAC output
- 16 MB (standard)
- 32 MB
- 64 MB
FPGA: Xilinx Spartan
- XC3S400 (standard)
with 1 to 68 MHz programmable clock oscillator.
110 mm x 65 mm
SRAM and RTC battery backups
- Rechargable 3.3 V coin cell
- 2 kB NVRAM (in MCU)